This invention relates generally to automatic test equipment, and more particularly to automatic test equipment used to make time measurements on digital electronic circuits.
Manufacturers of digital electronic circuits commonly use automatic test equipment (testers) to determine whether the circuits contain manufacturing defects. In general, a tester includes computerized control circuitry, numerous driver/receiver channels, and numerous tester pins. Each tester pin connects a driver/receiver channel to an electrical node of a circuit under test (CUT).
A tester typically provides digital test signals to and receives digital output signals from the electrical nodes of the CUT. The tester then compares the resulting output signals with values that would be expected from a properly functioning device. Both the digital test signals and the expected response values are defined by a series of test vectors. A typical test vector gives information regarding the data value, timing, and format of the digital signal that appears at each tester pin during one cycle of the tester's operation. For example, a test vector indicates whether the logical value of the digital signal is either a high or a low, the amount of time the signal is delayed relative to the beginning of the test cycle, and whether the signal is applied to or expected to be observed at a node of the CUT.
A tester also includes time measurement circuitry. FIG. 1A shows a partial block diagram of prior art tester 100, described in U.S. Pat. No. 4,792,932 to Bowhers et al. Digital comparators (not shown) included in driver/receiver channel 112 and driver/receiver channel 114 detect digital signals on CUT 120 and produce timing signals, called "start" and "stop" event edges, when the signals cross specified voltage thresholds. Driver/receiver channel 112 and driver/receiver channel 114 present the event edges to switching and time gate circuitry 108, which provides gated clock pulses and event edges to time counter 106 and time counter 104, respectively. Finally, time counter 106 counts the clock pulses between the "start" and "stop" event edges, and time counter 104 optionally counts the events between the "start" and "stop" event edges.
FIG. 1B is a timing diagram that is useful in describing the operation of tester 100. It is desired to measure the time interval from a rising edge of OUTPUT A to a rising edge of OUTPUT B. Both OUTPUT A and OUTPUT B are generated by CUT 120. Signal CUT READY, generated by CUT 120, is connected through tester pin 154 to a digital comparator (not shown) in driver/receiver channel 152. The digital comparator presents an edge to start enable 150 which provides signal START ENABLE to switching and time gate circuitry 108. Signal OUTPUT B is connected through tester pin 116 to a digital comparator (not shown) in driver/receiver channel 112. Driver/receiver channel 112 presents signal "START" EVENT EDGE to both stop enable 148 and switching and time gate circuitry 108. Stop enable 148 then provides signal STOP ENABLE to switching and time gate circuitry 108. Similarly, signal OUTPUT A is connected through tester pin 118 to a digital comparator (not shown) in driver/receiver channel 114, which presents signal "STOP" EVENT EDGE to switching and time gate circuitry 108. Switching and time gate circuitry 108 provides clock signals to time counter 106 during the time between signal "START" EVENT EDGE and signal "STOP" EVENT EDGE. The clock pulses counted between these two events are used to determine the desired time interval.
Such an approach is useful in making time measurements on digital signals. Moreover, this approach eliminates the need to route the output signals from CUT 120 to tester 100. The output signals pass to the driver/receiver channels, which are generally located near CUT 120, and only the "start" and "stop" event edges are routed to the time measurement circuitry in tester 100. However, this approach to making time measurements is limited by the resolution of the clock pulses provided by switching and time gate circuitry 108 to the time counters. For example, in order to make accurate time measurements, the clock pulses must have a period that is substantially less than the required resolution of the time measurement.
Another approach uses an interpolation technique to improve the accuracy of time measurements. For example, instead of simply counting the number of clock pulses occurring between the "start" event edge and the "stop" event edge, the time interval from the "start" event edge to the first clock pulse may also be measured. The "start" event edge triggers a ramp generator which produces an output voltage that increases linearly at a predetermined rate from a specified reference voltage. The first clock pulse then triggers circuitry which samples the output voltage of the ramp generator. The magnitude of the output voltage of the ramp generator is directly proportional to the time interval from the "start" event edge to the first clock pulse. This time interval is then added to the time interval determined by counting clock pulses between the "start" event edge and the "stop" event edge to achieve better accuracy in time measurements.
However, the accuracy of time measurements made using the interpolation technique is limited because it is usually impossible to make the output voltage of the ramp generator linear over its full range. For example, the reference voltage and the voltage at which the output is sampled may not represent two points within the linear region of the ramp. As a result, the output voltage of the ramp generator may not in fact be directly proportional to the time interval of interest.
Still another approach to making time measurements converts an output signal from the CUT to a DC value. The conversion is performed by a low-pass filter using known DC transform techniques. The resulting DC output, which is proportional to the duty cycle of the periodic output pulse provided by the CUT, is then sampled and measured. However, the resulting DC signal is often noisy, and the conversion is generally not accurate over a wide range of output pulse widths. Further, the circuitry which samples and measures the DC output must be linear over a wide range of voltage values.
Although each of these techniques have been used to make time measurements on digital electronic circuits, it would be desirable to have a method of making time measurements that provides both high resolution and good linearity without requiring a significant amount of additional circuitry in a tester.